200 lines
7.0 KiB
C
200 lines
7.0 KiB
C
/*
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* Copyright 2005-2015, Axel Dörfler, axeld@pinc-software.de. All rights reserved.
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* Copyright 2002-04, Thomas Kurschel. All rights reserved.
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*
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* Distributed under the terms of the MIT License.
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*/
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#ifndef _ATA_PCI_H
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#define _ATA_PCI_H
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/*! ATA adapter library
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Module to simplify writing an ATA adapter driver.
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The interface is not very abstract, i.e. the actual driver is
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free to access any controller or channel data of this library.
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*/
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#include <bus/ATA.h>
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#include <bus/PCI.h>
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#include <ata_types.h>
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// one Physical Region Descriptor (PRD)
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// (one region must not cross 64K boundary;
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// the PRD table must not cross a 64K boundary)
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typedef struct prd_entry {
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uint32 address; // physical address of block (must be even)
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uint16 count; // size of block, 0 stands for 65536 (must be even)
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uint8 res6;
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B_LBITFIELD8_2(
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res7_0 : 7,
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EOT : 1 // 1 for last entry
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);
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} prd_entry;
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// IDE bus master command register
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#define ATA_BM_COMMAND_START_STOP 0x01
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#define ATA_BM_COMMAND_READ_FROM_DEVICE 0x08
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// IDE bus master status register
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#define ATA_BM_STATUS_ACTIVE 0x01
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#define ATA_BM_STATUS_ERROR 0x02
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#define ATA_BM_STATUS_INTERRUPT 0x04
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#define ATA_BM_STATUS_MASTER_DMA 0x20
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#define ATA_BM_STATUS_SLAVE_DMA 0x40
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#define ATA_BM_STATUS_SIMPLEX_DMA 0x80
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// offset of bus master registers
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enum {
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ATA_BM_COMMAND_REG = 0,
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ATA_BM_STATUS_REG = 2,
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ATA_BM_PRDT_ADDRESS = 4
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// offset of PRDT register; content must be dword-aligned
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};
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// (maximum) size of S/G table
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// there are so many restrictions that we want to keep it inside one page
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// to be sure that we fulfill them all
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#define ATA_ADAPTER_MAX_SG_COUNT (B_PAGE_SIZE / sizeof( prd_entry ))
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// channel node items
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// io address of command block (uint16)
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#define ATA_ADAPTER_COMMAND_BLOCK_BASE "ata_adapter/command_block_base"
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// io address of control block (uint16)
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#define ATA_ADAPTER_CONTROL_BLOCK_BASE "ata_adapter/control_block_base"
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// interrupt number (uint8)
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// can also be defined in controller node if both channels use same IRQ!
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#define ATA_ADAPTER_INTNUM "ata_adapter/irq"
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// 0 if primary channel, 1 if secondary channel, 2 if tertiary, ... (uint8)
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#define ATA_ADAPTER_CHANNEL_INDEX "ata_adapter/channel_index"
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// controller node items
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// io address of bus master registers (uint16)
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#define ATA_ADAPTER_BUS_MASTER_BASE "ata_adapter/bus_master_base"
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// info about one channel
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typedef struct ata_adapter_channel_info {
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pci_device_module_info *pci;
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pci_device *device;
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uint16 command_block_base; // io address command block
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uint16 control_block_base; // io address control block
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uint16 bus_master_base;
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int intnum; // interrupt number
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uint32 lost; // != 0 if device got removed, i.e. if it must not
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// be accessed anymore
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ata_channel ataChannel;
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device_node *node;
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int32 (*inthand)( void *arg );
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area_id prd_area;
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prd_entry *prdt;
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uint32 prdt_phys;
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uint32 dmaing;
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} ata_adapter_channel_info;
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// info about controller
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typedef struct ata_adapter_controller_info {
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pci_device_module_info *pci;
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pci_device *device;
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uint16 bus_master_base;
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uint32 lost; // != 0 if device got removed, i.e. if it must not
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// be accessed anymore
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device_node *node;
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} ata_adapter_controller_info;
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// interface of IDE adapter library
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typedef struct {
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module_info info;
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void (*set_channel)(ata_adapter_channel_info *channel,
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ata_channel ataChannel);
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// function calls that can be forwarded from actual driver
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status_t (*write_command_block_regs)(ata_adapter_channel_info *channel,
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ata_task_file *tf, ata_reg_mask mask);
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status_t (*read_command_block_regs)(ata_adapter_channel_info *channel,
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ata_task_file *tf, ata_reg_mask mask);
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uint8 (*get_altstatus) (ata_adapter_channel_info *channel);
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status_t (*write_device_control) (ata_adapter_channel_info *channel, uint8 val);
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status_t (*write_pio)(ata_adapter_channel_info *channel, uint16 *data, int count, bool force_16bit);
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status_t (*read_pio)(ata_adapter_channel_info *channel, uint16 *data, int count, bool force_16bit);
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status_t (*prepare_dma)(ata_adapter_channel_info *channel, const physical_entry *sg_list,
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size_t sg_list_count, bool to_device);
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status_t (*start_dma)(ata_adapter_channel_info *channel);
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status_t (*finish_dma)(ata_adapter_channel_info *channel);
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// default functions that should be replaced by a more specific version
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// (copy them from source code of this library and modify them at will)
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int32 (*inthand)(void *arg);
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// functions that must be called by init/uninit etc. of channel driver
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status_t (*init_channel)(device_node *node,
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ata_adapter_channel_info **cookie, size_t total_data_size,
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int32 (*inthand)(void *arg));
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void (*uninit_channel)(ata_adapter_channel_info *channel);
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void (*channel_removed)(ata_adapter_channel_info *channel);
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// publish channel node
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status_t (*publish_channel)(device_node *controller_node,
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const char *channel_module_name, uint16 command_block_base,
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uint16 control_block_base, uint8 intnum, bool can_dma,
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uint8 channel_index, const char *name,
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const io_resource *resources, device_node **node);
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// verify channel configuration and publish node on success
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status_t (*detect_channel)(pci_device_module_info *pci, pci_device *pciDevice,
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device_node *controller_node, const char *channel_module_name,
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bool controller_can_dma, uint16 command_block_base,
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uint16 control_block_base, uint16 bus_master_base,
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uint8 intnum, uint8 channel_index, const char *name,
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device_node **node, bool supports_compatibility_mode);
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// functions that must be called by init/uninit etc. of controller driver
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status_t (*init_controller)(device_node *node,
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ata_adapter_controller_info **cookie, size_t total_data_size);
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void (*uninit_controller)(ata_adapter_controller_info *controller);
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void (*controller_removed)(ata_adapter_controller_info *controller);
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// publish controller node
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status_t (*publish_controller)(device_node *parent, uint16 bus_master_base,
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io_resource *resources, const char *controller_driver,
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const char *controller_driver_type, const char *controller_name,
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bool can_dma, bool can_cq, uint32 dma_alignment, uint32 dma_boundary,
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uint32 max_sg_block_size, device_node **node);
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// verify controller configuration and publish node on success
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status_t (*detect_controller)(pci_device_module_info *pci, pci_device *pciDevice,
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device_node *parent, uint16 bus_master_base,
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const char *controller_driver, const char *controller_driver_type,
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const char *controller_name, bool can_dma, bool can_cq,
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uint32 dma_alignment, uint32 dma_boundary, uint32 max_sg_block_size,
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device_node **node);
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// standard master probe for controller that registers controller and channel nodes
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status_t (*probe_controller)(device_node *parent, const char *controller_driver,
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const char *controller_driver_type, const char *controller_name,
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const char *channel_module_name, bool can_dma, bool can_cq,
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uint32 dma_alignment, uint32 dma_boundary, uint32 max_sg_block_size,
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bool supports_compatibility_mode);
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} ata_adapter_interface;
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#define ATA_ADAPTER_MODULE_NAME "generic/ata_adapter/v1"
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#endif /* _ATA_PCI_H */
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